-- 32 bit version register file
-- evillase

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity registerFile is
  port
    (
      -- Write data input port
      wdat   : in  std_logic_vector (31 downto 0);
      -- Select which register to write
      wsel   : in  std_logic_vector (4 downto 0);
      -- Write Enable for entire register file
      wen    : in  std_logic;
      -- clock, positive edge triggered
      clk    : in  std_logic;
      -- REMEMBER: nReset-> '0' = RESET, '1' = RUN
      nReset : in  std_logic;
      -- Select which register to read on rdat1 
      rsel1  : in  std_logic_vector (4 downto 0);
      -- Select which register to read on rdat2
      rsel2  : in  std_logic_vector (4 downto 0);
      -- read port 1
      rdat1  : out std_logic_vector (31 downto 0);
      -- read port 2
      rdat2  : out std_logic_vector (31 downto 0)
      );
end registerFile;

architecture regfile_arch of registerFile is

  constant BAD1 : std_logic_vector := x"BAD1BAD1";

  type   REGISTER32 is array (1 to 31) of std_logic_vector(31 downto 0);
  signal reg : REGISTER32 := (others => x"00000000");  -- registers as an array

  -- enable lines... use en(x) to select
  -- individual lines for each register
  signal en   : std_logic_vector(31 downto 0);
  signal zero : std_logic_vector(31 downto 0);

begin

  -- registers process
  registers : process (clk, nReset, wen, wdat)
  begin

    -- one register if statement
    if (nReset = '0') then
      -- Reset here
      
      reg <= (others => x"00000000");
      
      
    elsif (rising_edge(clk)) then
      -- Set register here
      
      if(wen = '1') then
        
        if(wsel /= "00000") then
          reg(TO_INTEGER(unsigned(wsel))) <= wdat;
        else
          reg <= reg;
        end if;
      else
        reg <= reg;
      end if;
      
    end if;
    
  end process;


  --rsel muxes
  with TO_INTEGER(unsigned(rsel1)) select
    rdat1 <= x"00000000"             when 0,
    reg(TO_INTEGER(unsigned(rsel1))) when others;

  with TO_INTEGER(unsigned(rsel2)) select
    rdat2 <= x"00000000"             when 0,
    reg(TO_INTEGER(unsigned(rsel2))) when others;

end regfile_arch;
